The present invention is related to the testing of integrated circuits and, more particularly, to measurement circuits of fuse elements in integrated circuits.
One type of fuse element is the antifuse, which is found in a growing number of integrated circuits, most of which are field programmable gate arrays (FPGAs). Antifuses have a very high resistance (to form essentially an open circuit) in the unprogrammed ("off") state, and a very low resistance (to form essentially a closed circuit) in the programmed ("on") state. In these integrated circuits antifuses are placed at the crossing points of interconnection lines which lead to different elements of the integrated circuit. By programming selected antifuses, the interconnections between the various elements of the integrated circuit are formed to define the function of the device.
To program these antifuses, a large voltage is placed across the selected antifuse. In the antifuse a nominally nonconducting programming layer, where two conducting lines cross, is melted to create a connection between the two conducting lines. The resistance of the unprogrammed antifuse, greater than 1 MegOhm, drops to tens of ohms, when programmed.
The description above is ideal. Problems may occur when the resistance of the programmed antifuse is not as low as desired. However, since the typical FPGA typically has hundreds of thousands of antifuses, it is difficult to locate a particular antifuse, and, once located, to test the antifuse.
The present invention solves or substantially mitigates these problems with test circuitry which is embedded in the integrated circuit to measure the resistance of a selected antifuse. In accordance with the present invention, the test circuitry is implemented in the integrated circuit with a minimum of overhead.